SE98A_4
?NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 25 November 2009
30 of 43
NXP Semiconductors
SE98A
DDR memory module temp sensor, 1.7 V to 3.6 V
[1] High-voltage input voltage applied to pin A0 during RWP and CRWP operations of the equivalent SPD-included parts. The JEDEC
specification is 7 V (min.) and 10 V (max.). When V
DD
is 3.6 V, then V
I(ov)
> 4.8 V + V
DD
or > 4.8 V + 3.6 V then the minimum voltage is
8.4 V.
Table 26. SMBus DC characteristics
V
DD
= 1.7 V to 3.6 V; T
amb
= 20 ?/SPAN>C to +120 ?/SPAN>C; unless otherwise specified. These specifications are guaranteed by design.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V
IH
HIGH-level input voltage
SCL, SDA;
V
DD
= 1.7 V to 3.6 V
0.7V
DD
-
V
DD
+ 1 V
V
IL
LOW-level input voltage
SCL, SDA;
V
DD
= 1.7 V to 3.6 V
-
-
0.3V
DD
V
V
I(ov)
overvoltage input voltage
pin A0;
V
I(ov)
V
DD
> 4.8 V
[1]
7.0
-
10
V
V
th(POR)H
HIGH-level power-on reset
threshold voltage
-
-
1.7
V
V
th(rec)POR
power-on reset recovery
threshold voltage
for device reset
-
-
0.5
V
I
OL(sink)EVENT
LOW-level output sink current on
pin EVENT
V
OL
= 0.4 V
6
-
-
mA
I
OL(sink)(SDA)
LOW-level output sink current on
pin SDA
V
OL
= 0.5 V
3
-
-
mA
I
LOH
HIGH-level output leakage current
V
OH
= V
DD
-
-
1.0
糀
I
LIH
HIGH-level input leakage current
pins SCL, SDA;
V
I
= V
DD
or V
SS
1.0
-
+1.0
糀
I
LIL
LOW-level input leakage current
pins SCL, SDA;
V
I
= V
DD
or V
SS
1.0
-
+1.0
糀
C
i
input capacitance
SCL, SDA pins
-
5
10
pF
a. I
2
C-bus inactive
b. I
2
C-bus active
Fig 16. Average supply current
150
250
350
I
DD(AV)
(糀)
50
T
amb
(癈)
50
125
002aae374
100
75
50
25
0
25
V
DD
= 3.6 V
3.0 V
2.3 V
1.7 V
150
250
350
I
DD(AV)
(糀)
50
T
amb
(癈)
50
125
002aae375
100
75
50
25
0
25
V
DD
= 3.6 V
3.0 V
2.3 V
1.7 V
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